1. Field of the Invention
The embodiments of the invention generally relate to fin-type field effect transistors and, more particularly, to a fin-type field effect transistor having multiple fins which are merged by a conductor (e.g., a metal silicide).
2. Description of the Related Art
As transistor design is improved and evolves, the number of different types of transistors continues to increase. Multi-gated non-planar metal oxide semiconductor field effect transistors, including dual-gate fin-type FETs and tri-gate fin-type FETs, were developed to provide scaled devices with faster drive currents and reduced short channel effects over planar FETs.
A dual-gate fin-type FET is a FET in which the channel region is formed in the center of a thin semiconductor fin. The source/drain regions are formed in the opposing ends of the fin on either side of the channel region. Gates are generally formed on each side of the thin semiconductor fin in an area corresponding to the channel region. A “finFET” generally refers to a dual-gate fin-type FET in which the fin is so thin as to be fully depleted. The effective fin width is determined by the fin height (e.g., short wide fins can cause partial depletion of a channel). For a finFET, a fin thickness of approximately one-fourth the length of the gate (or less) can ensure suppression of deleterious short-channel effects, such as variability in threshold voltage and excessive drain leakage currents. FinFETs are discussed in U.S. Pat. No. 6,413,802 to Hu et al., which is incorporated herein by reference
A tri-gate fin-type FET has a similar structure to that of a dual-gate fin-type FET; however, the fin width and height are approximately the same so that gates can be formed on three sides of the channel region, including the top surface and the opposing sidewalls. The height to width ratio is generally in the range of 3:2 to 2:3 so that the channel region will remain fully depleted and the three-dimensional field effects of a tri-gate FET will give greater drive current and improved short-channel characteristics over a planar transistor.
The effective channel width of both dual-gate and tri-gate fin-type FETs can further be increased by incorporating multiple fins into the FET structure. However, as the size of such FET structures is scaled, drive current becomes limited by series resistance.